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? semiconductor components industries, llc, 2012 february, 2012 ? rev. 2 1 publication order number: ncp4671/d ncp4671 400 ma, dual rail ultra low dropout linear regulator the ncp4671 is a cmos dual supply rail linear regulator designed to provide very low output voltages. the dual rail architecture which separates the power for the ldo control circuitry (provided via the vbias pin) from the main power path (vin) offers ultra ? low dropout performance, allowing the device to operate from input voltages down to 0.9 v and to generate a fixed high accuracy output voltage as low as 0.6 v. the ncp4671 offers excellent transient response with very low quiescent currents. the family is available in a variety of packages: sc ? 70, sot23 and a small, ultra thin 1.2 x 1.2 x 0.4mm xdfn. features ? bias supply voltage range : 2.4 v to 5.25 v (v out < 0.8 v) set v out + 1.6 v to 5.25 v (v out 0.8 v) ? power input voltage range : 0.9 v to v bias (v out < 0.8 v) set v out + 0.1 v to v bias (v out 0.8 v) ? output voltage range: 0.6 to 1.5 v (available at 0.1 steps) ? very low dropout: 180 mv typ. at 400 ma ? quiescent current: 28 a ? standby current: 0.1 a ? 15 mv output voltage accuracy (t a = 25 c) ? high psrr: 80 db at 1 khz (ripple at vin) 50 db at 1 khz (ripple at vbias) ? current fold back protection typ. 120 ma ? available in xdfn, sc ? 70, sot23 package ? these are pb ? free devices typical applications ? battery powered equipments ? portable communication equipments ? cameras, vcrs and camcorders vin vout ce gnd c1 c3 2 2 vin vout ncp4671x vbias c2 1 1 dc/dc converter figure 1. typical application schematic http://onsemi.com see detailed ordering, marking and shipping information in the package dimensions section on pag e 20 of this data sheet. ordering information sc ? 70 case 419a (in development) xx, xxx= specific device code m, mm = date code a = assembly location y = year w = work week = pb ? free package marking diagrams (*note: microdot may be in either location) xdfn6 case 711aa sot ? 23 ? 5 case 1212 xx mm xxx xmm 1 xxxmm 1 1
ncp4671 http://onsemi.com 2 current limit vref vbias ce vin gnd vout uvlo current limit vref vbias ce vin gnd vout uvlo ncp4671hxxxxxxxx ncp4671dxxxxxxxx figure 2. simplified schematic block diagram pin function description pin no. xdfn pin no. sc ? 70 pin no. sot23 pin name description 1 1 4 vbias input pin 1 2 2 2 gnd ground pin 3 5 3 ce chip enable pin (?h? active) 4 4 1 vin input pin 2 5 ? ? nc not connected 6 3 5 vout output pin absolute maximum ratings rating symbol value unit bias supply input voltage (note 1) v bias 6.0 v power supply input voltage (for driver) (note 1) v in ? 0.3 to v bias + 0.3 v output voltage v out ? 0.3 to v in + 0.3 v chip enable input v ce 6.0 v output current i out 500 ma power dissipation xdfn p d 400 mw power dissipation sc ? 70 380 power dissipation sot23 420 maximum junction temperature t j(max) 150 c storage temperature t stg ? 55 to 125 c esd capability, human body model (note 2) esd hbm 2000 v esd capability, machine model (note 2) esd mm 200 v stresses exceeding maximum ratings may damage the device. maximum ratings are stress ratings only. functional operation above t he recommended operating conditions is not implied. extended exposure to stresses above the recommended operating conditions may af fect device reliability. 1. refer to electrical characteristis and application information for safe operating area. 2. this device series incorporates esd protection and is tested by the following methods: esd human body model tested per aec ? q100 ? 002 (eia/jesd22 ? a114) esd machine model tested per aec ? q100 ? 003 (eia/jesd22 ? a115) latchup current maximum rating tested per jedec standard: jesd78.
ncp4671 http://onsemi.com 3 thermal characteristics rating symbol value unit thermal characteristics, xdfn thermal resistance, junction ? to ? air r ja 250 c/w thermal characteristics, sot23 thermal resistance, junction ? to ? air r ja 238 c/w thermal characteristics, sc ? 70 thermal resistance, junction ? to ? air r ja 263 c/w electrical characteristics ? 40 c t a 85 c, v bias = v ce = 3.6 v, v in = v out(nom) + 0.5 v, i out = 1 ma, c bias = c in = 1.0 f, c out = 2.2 f, unless otherwise noted. typical values are at t a = +25 c. parameter test conditions symbol min typ max unit operating supply input voltage (note 3) v out < 0.8 v v bias 2.4 5.25 v v out 0.8 v v out + 1.6 5.25 operating power input voltage (note 3) v out < 0.8 v v in 0.9 v bias v v out 0.8 v v out + 0.1 v bias output voltage t a = +25 c v out ? 15 +15 mv t a = ? 40 c to +85 c ? 20 +20 output voltage temp. coefficient t a = ? 40 c to +85 c 50 ppm/ c line regulation v bias = 2.4v to 5.0v line reg 0.02 0.10 %/v v in = v out + 0.3 v to 2.4 v 0.02 0.10 load regulation i out = 1 ma to 400 ma load reg 30 50 mv dropout voltage please refer to following detailed table. output current i out 400 ma short current limit v out = 0 v i sc 120 ma quiescent current i out = 0 ma i q 28 40 a standby current v ce = 0 v, t a = 25 c i stb 0.1 3 a ce pin threshold voltage ce input voltage ?h? v ceh 0.8 v ce input voltage ?l? v cel 0.3 ce pull down current i pd 1 a vin under voltage lock out i out = 1 a v in_uvlo v out + 0.05 v out + 0.1 v power supply rejection ratio i out = 30 ma, f = 1 khz, v in ripple 0.2 v p ? p psrr 80 db i out = 30 ma, f = 1 khz, v bias ripple 0.2 v p ? p 50 output noise voltage v out = 0.6 v, i out = 30 ma, f = 10 hz to 100 khz v n 70 v rms low output nch tr. on resistance d version only, v bias = 3.6 v, v ce = ?l? r low 50 3. if input voltage range is between 5.25 v and 5.50 v, the total operational time must be within 500 hrs.
ncp4671 http://onsemi.com 4 dropout voltage (v do [v]) v out / v bias v do [v] @ i out = 200 ma (t a = 25 c) v do [v] @ i out = 300 ma v do [v] @ i out = 400 ma t a = 25 c t a = ? 40 c to +85 c t a = 25 c t a = ? 40 c to +85 c 2.5 v 3.0 v 3.3 v 3.6 v 4.2 v 5.0 v 3.6 v 3.6 v 3.6 v 3.6 v 0.6 v 0.094 0.093 0.093 0.092 0.092 0.091 0.115 0.180 0.180 0.320 0.7 v 0.094 0.093 0.093 0.092 0.092 0.092 0.120 0.190 0.180 0.320 0.8 v 0.098 0.093 0.093 0.092 0.092 0.092 0.120 0.190 0.180 0.300 0.9 v 0.098 0.094 0.093 0.092 0.092 0.092 0.120 0.190 0.180 0.300 1.0 v * 0.094 0.093 0.092 0.092 0.092 0.120 0.190 0.180 0.280 1.2 v 0.098 0.096 0.095 0.095 0.094 0.130 0.200 0.180 0.280 1.3 v 0.098 0.096 0.095 0.095 0.095 0.130 0.200 0.180 0.260 1.4 v 0.098 0.096 0.095 0.095 0.095 0.130 0.200 0.180 0.260 1.5 v * 0.096 0.095 0.095 0.095 0.130 0.200 0.180 0.260 *vbias voltage must be equal or more than v out(nom) + 1.6 v
ncp4671 http://onsemi.com 5 typical characteristics 0.0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0 100 200 300 400 500 600 700 800 900 figure 3. output voltage vs. output current 0.6 v version (t a = 25 c) v in = 0.79 v 1.10 v 2.40 v i out , output current (ma) v out , output voltage (v) v bias = 2.40 v 0.0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0 100 200 300 400 500 600 700 800 900 figure 4. output voltage vs. output current 0.6 v version (t a = 25 c) i out , output current (ma) v out , output voltage (v) v bias = 3.60 v v in = 0.79 v 1.10 v 3.60 v 0.0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0 100 200 300 400 500 600 700 800 900 figure 5. output voltage vs. output current 0.6 v version (t a = 25 c) i out , output current (ma) v out , output voltage (v) v bias = 5.25 v v in = 0.79 v 1.10 v 5.25 v 0.0 0.2 0.4 0.6 0.8 1.0 1.2 0 100 200 300 400 500 600 700 800 900 v out , output voltage (v) v bias = 2.60 v v in = 1.22 v 1.50 v 2.60 v figure 6. output voltage vs. output current 1.0 v version (t a = 25 c) i out , output current (ma) 0.0 0.2 0.4 0.6 0.8 1.0 1.2 0 100 200 300 400 500 600 700 800 900 figure 7. output voltage vs. output current 1.0 v version (t a = 25 c) i out , output current (ma) v out , output voltage (v) v bias = 3.60 v v in = 1.22 v 1.50 v 3.60 v 0.0 0.2 0.4 0.6 0.8 1.0 1.2 0 100 200 300 400 500 600 700 800 900 v out , output voltage (v) v bias = 5.25 v v in = 1.22 v 1.50 v 5.25 v figure 8. output voltage vs. output current 1.0 v version (t a = 25 c) i out , output current (ma)
ncp4671 http://onsemi.com 6 typical characteristics 0.0 0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6 0 100 200 300 400 500 600 700 800 900 1000 v out , output voltage (v) figure 9. output voltage vs. output current 1.5 v version (t a = 25 c) i out , output current (ma) v bias = 3.10 v v in = 1.76 v 2.00 v 3.10 v 0.0 0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6 0 100 200 300 400 500 600 700 800 900 1000 v out , output voltage (v) figure 10. output voltage vs. output current 1.5 v version (t a = 25 c) i out , output current (ma) v bias = 3.60 v v in = 1.72 v 2.00 v 3.60 v 0.0 0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6 0 100 200 300 400 500 600 700 800 900 1000 v out , output voltage (v) figure 11. output voltage vs. output current 1.5 v version (t a = 25 c) i out , output current (ma) v bias = 5.25 v v in = 1.76 v 2.00 v 5.25 v 0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 012345 v out , output voltage (v) figure 12. output voltage vs. input voltage 0.6 v version (t a = 25 c) v in , input voltage (v) v bias = 2.4 v i out = 1 ma 30 ma 50 ma 0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 012345 i out = 1 ma 30 ma 50 ma v out , output voltage (v) figure 13. output voltage vs. input voltage 0.6 v version (t a = 25 c) v in , input voltage (v) v bias = 3.6 v 0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 012345 i out = 1 ma 30 ma 50 ma figure 14. output voltage vs. input voltage 0.6 v version (t a = 25 c) v in , input voltage (v) v bias = 5.25 v v out , output voltage (v)
ncp4671 http://onsemi.com 7 typical characteristics 0 0.2 0.4 0.6 0.8 1 1.2 012345 v out , output voltage (v) figure 15. output voltage vs. input voltage 1.0 v version (t a = 25 c) v in , input voltage (v) v bias = 2.6 v i out = 1 ma 30 ma 50 ma 0 0.2 0.4 0.6 0.8 1 1.2 012345 v out , output voltage (v) figure 16. output voltage vs. input voltage 1.0 v version (t a = 25 c) v in , input voltage (v) i out = 1 ma 30 ma 50 ma v bias = 3.2 v 0 0.2 0.4 0.6 0.8 1 1.2 012345 v out , output voltage (v) figure 17. output voltage vs. input voltage 1.0 v version (t a = 25 c) v in , input voltage (v) i out = 1 ma 30 ma 50 ma v bias = 5.25 v 0 0.2 0.4 0.6 0.8 1 1.2 1.4 1.6 012345 v out , output voltage (v) figure 18. output voltage vs. input voltage 1.5 v version (t a = 25 c) v in , input voltage (v) i out = 1 ma 30 ma 50 ma v bias = 3.1 v 0 0.2 0.4 0.6 0.8 1 1.2 1.4 1.6 012345 v out , output voltage (v) figure 19. output voltage vs. input voltage 1.5 v version (t a = 25 c) v in , input voltage (v) i out = 1 ma 30 ma 50 ma v bias = 3.6 v 0 0.2 0.4 0.6 0.8 1 1.2 1.4 1.6 012345 v out , output voltage (v) figure 20. output voltage vs. input voltage 1.5 v version (t a = 25 c) v in , input voltage (v) i out = 1 ma 30 ma 50 ma v bias = 5.25 v
ncp4671 http://onsemi.com 8 typical characteristics 0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 012345 v out , output voltage (v) figure 21. output voltage vs. bias voltage 0.6 v version (t a = 25 c) v bias , bias voltage (v) i out = 1 ma 30 ma 50 ma 0 0.2 0.4 0.6 0.8 1 1.2 012345 v out , output voltage (v) figure 22. output voltage vs. bias voltage 1.0 v version (t a = 25 c) v bias , bias voltage (v) i out = 1 ma 30 ma 50 ma 0 0.2 0.4 0.6 0.8 1 1.2 1.4 1.6 012345 v out , output voltage (v) figure 23. output voltage vs. bias voltage 1.5 v version (t a = 25 c) v bias , bias voltage (v) i out = 1 ma 30 ma 50 ma 0.58 0.585 0.59 0.595 0.6 0.605 0.61 ? 50 ? 25 0 25 50 75 100 v out , output voltage (v) figure 24. output voltage vs. temperature 0.6 v version t j , junction temperature ( c) 0.985 0.99 0.995 1 1.005 1.01 1.015 v out , output voltage (v) figure 25. output voltage vs. temperature 1.0 v version t j , junction temperature ( c) ? 50 ? 25 0 25 50 75 100 1.48 1.485 1.49 1.495 1.5 1.505 ? 50 ? 25 0 25 50 75 100 v out , output voltage (v) figure 26. output voltage vs. temperature 1.5 v version t j , junction temperature ( c)
ncp4671 http://onsemi.com 9 typical characteristics 0 2 4 6 8 10 12 14 012345 i q , quiecent current ( a) figure 27. quiescent current vs. input voltage 0.6 v version v in , input voltage (v) v bias = 2.4 v 3.6 v 5.25 v 0 2 4 6 8 10 012345 i q , quiecent current ( a) figure 28. quiescent current vs. input voltage 1.0 v version v in , input voltage (v) v bias = 2.4 v 3.6 v 5.25 v 0 1 2 3 4 5 6 7 8 9 10 012345 i q , quiecent current ( a) figure 29. quiescent current vs. input voltage 1.5 v version v in , input voltage (v) v bias = 2.4 v 3.6 v 5.25 v 20 24 28 32 36 40 ? 50 ? 25 0 25 50 75 100 figure 30. supply current vs. temperature 0.6 v version t j , junction temperature ( c) supply current ( a) v bias = 3.6 v v in = 1.1 v 20 24 28 32 36 40 ? 50 ? 25 0 25 50 75 100 figure 31. supply current vs. temperature 1.0 v version t j , junction temperature ( c) supply current ( a) v bias = 3.6 v v in = 1.5 v 20 24 28 32 36 40 ? 50 ? 25 0 25 50 75 100 figure 32. supply current vs. temperature 1.5 v version t j , junction temperature ( c) supply current ( a) v bias = 3.6 v v in = 2.0 v
ncp4671 http://onsemi.com 10 typical characteristics 0 40 80 120 160 200 50 100 150 200 250 300 350 400 t j = 85 c ? 40 c 25 c figure 33. dropout voltage vs. output current 0.6 v version i out , output current (ma) v do , dropout voltage (mv) 0 40 80 120 160 200 50 100 150 200 250 300 350 400 figure 34. dropout voltage vs. output current 1.0 v version i out , output current (ma) v do , dropout voltage (mv) 25 c ? 40 c t j = 85 c 0 50 100 150 200 250 50 100 150 200 250 300 350 400 t j = 85 c ? 40 c 25 c figure 35. dropout voltage vs. output current 1.5 v version i out , output current (ma) v do , dropout voltage (mv) 0 20 40 60 80 100 100 1k 10k 100k 1m 10m figure 36. psrr vs. frequency 0.6 v version frequency (hz) psrr (db) i out = 1 ma 30 ma 50 ma 0 20 40 60 80 100 figure 37. psrr vs. frequency 1.0 v version frequency (hz) psrr (db) i out = 1 ma 30 ma v in = 1.1 v + 200 mv pp modulation, v bias = 3.6 v, c bias = 1 f v in = 1.5 v + 200 mv pp modulation, v bias = 3.6 v, c bias = 1 f 0 10 20 30 40 50 60 70 80 90 100 figure 38. psrr vs. frequency 1.5 v version frequency (hz) psrr (db) i out = 1 ma 30 ma v in = 2.0 v + 200 mv pp modulation, v bias = 3.6 v, c bias = 1 f 100 1k 10k 100k 1m 10m 100 1k 10k 100k 1m 10m
ncp4671 http://onsemi.com 11 typical characteristics 0 20 40 60 80 100 figure 39. psrr vs. frequency 0.6 v version frequency (hz) psrr (db) i out = 1 ma 30 ma v in = 1.1 v, c in = 2.2 f, v bias = 3.6 v + 200 mv pp modulation 150 ma 0 20 40 60 80 100 figure 40. psrr vs. frequency 1.0 v version frequency (hz) psrr (db) i out = 1 ma 30 ma 150 ma v in = 1.5 v, c in = 2.2 f, v bias = 3.6 v + 200 mv pp modulation 0 10 20 30 40 50 60 70 80 90 100 figure 41. psrr vs. frequency 1.5 v version frequency (hz) psrr (db) i out = 1 ma 30 ma 150 ma v in = 2.0 v, c in = 2.2 f, v bias = 3.6 v + 200 mv pp modulation 100 1k 10k 100k 1m 10m 100 1k 10k 100k 1m 10m 100 1k 10k 100k 1m 10m
ncp4671 http://onsemi.com 12 typical characteristics 2.4 3.0 3.6 4.2 0.54 0.56 0.58 0.60 0.62 0.64 0.66 0 20 40 60 80 100 120 140 160 180 200 figure 42. line transients response, 0.6 v version t ( s) v out (v) v bias (v) v in = 1.1 v, c in = 2.2 f, v bias = step 2.4 v to 3.6 v 2.4 3.0 3.6 4.2 0.94 0.96 0.98 1.00 1.02 1.04 0 20 40 60 80 100 120 140 160 180 200 figure 43. line transients response, 1.0 v version t ( s) v out (v) v bias (v) v in = 1.5 v, c in = 2.2 f, v bias = step 2.4 v to 3.6 v 2.4 3.0 3.6 4.2 1.44 1.46 1.48 1.50 1.52 1.54 1.56 0 20 40 60 80 100 120 140 160 180 200 figure 44. line transients response, 1.5 v version t ( s) v out (v) v bias (v) v in = 2.0 v, c in = 2.2 f, v bias = step 2.4 v to 3.6 v
ncp4671 http://onsemi.com 13 typical characteristics 1.1 1.6 2.1 2.6 0.594 0.596 0.598 0.600 0.602 0.604 0 20 40 60 80 100 120 140 160 180 200 figure 45. line transients response, 0.6 v version t ( s) v out (v) v in (v) v in = step 1.1 v to 2.1 v, v bias = 3.6 v, c bias = 1 f 1.5 2.0 2.5 3.0 0.994 0.996 0.998 1.000 1.002 1.004 0 20 40 60 80 100 120 140 160 180 200 figure 46. line transients response, 1.0 v version t ( s) v out (v) v in (v) v in = step 1.5 v to 2.5 v, v bias = 3.6 v, c bias = 1 f 2.0 2.5 3.0 3.5 1.494 1.496 1.498 1.500 1.502 1.504 0 20 40 60 80 100 120 140 160 180 200 figure 47. line transients response, 1.5 v version t ( s) v out (v) v in (v) v in = step 2.0 v to 3.0 v, v bias = 3.6 v, c bias = 1 f
ncp4671 http://onsemi.com 14 typical characteristics 0 200 400 600 0.54 0.56 0.58 0.60 0.62 0.64 0.0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1.0 figure 48. load transients response, 0.6 v version, i out step 1 ma to 400 ma t (ms) v out (v) i out (ma) v in = 1.1 v, v bias = 3.6 v, c in = 2.2 f, c bias = 1 f 0 200 400 600 0.94 0.96 0.98 1.00 1.02 1.04 1.06 0.0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1.0 figure 49. load transients response, 1.0 v version, i out step 1 ma to 400 ma t (ms) v out (v) i out (ma) v in = 1.5 v, v bias = 3.6 v, c in = 2.2 f, c bias = 1 f 0 200 400 600 1.44 1.46 1.48 1.50 1.52 1.54 1.56 0.0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1.0 figure 50. load transients response, 1.5 v version, i out step 1 ma to 400 ma t (ms) v out (v) i out (ma) v in = 2.0 v, v bias = 3.6 v, c in = 2.2 f, c bias = 1 f
ncp4671 http://onsemi.com 15 typical characteristics 0 50 100 150 0.585 0.590 0.595 0.600 0.605 0.610 0.0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1.0 figure 51. load transients response, 0.6 v version, i out step 50 ma to 100 ma t (ms) v out (v) i out (ma) v in = 1.1 v, v bias = 3.6 v, c in = 2.2 f, c bias = 1 f 0 50 100 150 0.985 0.990 0.995 1.000 1.005 1.010 0.0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1.0 figure 52. load transients response, 1.0 v version, i out step 50 ma to 100 ma t (ms) v out (v) i out (ma) v in = 1.5 v, v bias = 3.6 v, c in = 2.2 f, c bias = 1 f 0 50 100 150 1.485 1.490 1.495 1.500 1.505 1.510 0.0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1.0 figure 53. load transients response, 1.5 v version, i out step 50 ma to 100 ma t (ms) v out (v) i out (ma) v in = 2.0 v, v bias = 3.6 v, c in = 2.2 f, c bias = 1 f
ncp4671 http://onsemi.com 16 typical characteristics 0.00 0.55 1.10 1.65 0.0 0.2 0.4 0.6 0 4 8 12 16 20 24 28 32 36 40 figure 54. turn on behavior, 0.6 v version v out (v) v in (v) t ( s) i out = 1 ma v in i out = 250 ma i out = 30 ma v bias = v ce = 3.6 v, c out = 2.2 f 0.00 0.75 1.50 2.25 0.0 0.2 0.4 0.6 0.8 1.0 0 4 8 1216202428323640 figure 55. turn on behavior, 1.0 v version v out (v) v in (v) t ( s) v in i out = 1 ma i out = 400 ma i out = 30 ma v bias = v ce = 3.6 v, c out = 2.2 f 0 1 2 3 0.0 0.5 1.0 1.5 2.0 0 4 8 12 16 20 24 28 32 36 40 figure 56. turn on behavior, 1.5 v version v out (v) v in (v) t ( s) i out = 1 ma i out = 400 ma i out = 30 ma v bias = v ce = 3.6 v, c out = 2.2 f v in
ncp4671 http://onsemi.com 17 typical characteristics 0 1.8 3.6 5.4 0.0 0.2 0.4 0.6 0 4 8 1216202428323640 figure 57. turn on behavior with ce, 0.6 v version v out (v) v ce (v) t ( s) i out = 1 ma i out = 250 ma i out = 30 ma v in = 1.1 v, v bias = 3.6 v, c in = c out = 2.2 f, c bias = 1 f 0 1.8 3.6 5.4 0.0 0.2 0.4 0.6 0.8 1.0 0 4 8 1216202428323640 figure 58. turn on behavior with ce, 1.0 v version v out (v) v ce (v) t ( s) chip enable chip enable i out = 1 ma i out = 400 ma i out = 30 ma 0 1.8 3.6 5.4 0.0 0.5 1.0 1.5 2.0 0 4 8 1216202428323640 figure 59. turn on behavior with ce, 1.5 v version v out (v) v ce (v) t ( s) chip enable i out = 1 ma i out = 400 ma i out = 30 ma v in = 1.5 v, v bias = 3.6 v, c in = c out = 2.2 f, c bias = 1 f v in = 2.5 v, v bias = 3.6 v, c in = c out = 2.2 f, c bias = 1 f
ncp4671 http://onsemi.com 18 typical characteristics 0 1.8 3.6 5.4 0.0 0.2 0.4 0.6 0.0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1.0 figure 60. turn off behavior with ce, 0.6 v version v out (v) v ce (v) t (ms) chip enable i out = 1 ma i out = 250 ma i out = 30 ma v in = 1.1 v, v bias = 3.6 v, c in = c out = 2.2 f, c bias = 1 f 0 1.8 3.6 5.4 0.0 0.2 0.4 0.6 0.8 1.0 0.0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1.0 figure 61. turn off behavior with ce, 1.0 v version v out (v) v ce (v) t (ms) v in = 1.1 v, v bias = 3.6 v, c in = c out = 2.2 f, c bias = 1 f chip enable i out = 1 ma i out = 400 ma i out = 30 ma 0 1.8 3.6 5.4 0.0 0.5 1.0 1.5 2.0 0.0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1.0 figure 62. turn off behavior with ce, 1.5 v version v out (v) v ce (v) t (ms) chip enable i out = 1 ma i out = 400 ma i out = 30 ma v in = 2.0 v, v bias = 3.6 v, c in = c out = 2.2 f, c bias = 1 f
ncp4671 http://onsemi.com 19 application information a typical application circuit for the ncp4671 series is shown in figure 63. the ncp4671 has two independent inputs, vbias pin is used for powering control part of the ldo and its value is equal or higher than value of second input pin vin where voltage that has to be regulated is connected. vin vout ce gnd c1 c3 2 2 vbias vout ncp4671x vbias vin c2 1 1 figure 63. typical application schematic dual rail architecture is app ropriate when the regulator is connected for example behind a buck dc/dc converter. bias voltage can be taken from input of the buck dc/dc converter and as input voltage is used output of the buck dc/dc converter as it is shown in figure 64 . condition that bias voltage must be higher than input voltage can be in this schematic easy fulfilled. vin vout ce gnd c1 c3 2 2 vin vout ncp4671x vbias c2 1 1 dc/dc converter figure 64. typical application schematic with dc/dc converter input decoupling capacitors (c1 and c2) a 1 f ceramic input decoupling capacitors should be connected as close as possible to the vin and vbias input and ground pin of the ncp4671. higher values and lower esr of capacitor c1 improves line transient response. output decoupling capacitor (c3) a 2.2 f or larger ceramic output decoupling capacitor is sufficient to achieve stable operation of the ic. if a tantalum capacitor is used, and its esr is high, loop oscillation may result. the capacitors should be connected as close as possible to the output and ground pins. larger values and lower esr improves dynamic parameters. enable operation the enable pin ce may be used for turning the regulator on and off. the regulator is switched on when ce pin voltage is above logic high level. the enable pin has an internal pull down current source. if the enable function is not needed connect ce pin to vbias. output discharger the d version includes a transistor between vout and gnd that is used for faster discharging of the output capacitor. this function is activated when the ic goes into disable mode. thermal as power across the ic increases, it might become necessary to provide some thermal relief. the maximum power dissipation supported by the device is dependent upon board design and layout. mounting pad configuration on the pcb, the board material, and also the ambient temperature affect the rate of temperature rise for the part. that is to say, when the device has good thermal conductivity through the pcb, the junction temperature will be relatively low with high power dissipation applications. pcb layout make vin, vbias and gnd line sufficient. if their impedance is high, noise pickup or unstable operation may result. connect capacitors c1, c2 and c3 as close as possible to the ic, and make wiring as short as possible.
ncp4671 http://onsemi.com 20 ordering information device nominal output voltage marking enable package shipping ? ncp4671dsn06t1g 0.6 v r1a auto ? discharge sot ? 23 ? 5 (pb ? free) 3000 / tape & reel ncp4671dsn09t1g 0.9 v r1d auto ? discharge sot ? 23 ? 5 (pb ? free) 3000 / tape & reel ncp4671dsn10t1g 1.0 v r1e auto ? discharge sot ? 23 ? 5 (pb ? free) 3000 / tape & reel ncp4671dsn12t1g 1.2 v r1f auto ? discharge sot ? 23 ? 5 (pb ? free) 3000 / tape & reel NCP4671DSN13T1G 1.3 v r1g auto ? discharge sot ? 23 ? 5 (pb ? free) 3000 / tape & reel ncp4671dsn15t1g 1.5 v r1j auto ? discharge sot ? 23 ? 5 (pb ? free) 3000 / tape & reel ncp4671dmx06tcg 0.6 v ba auto ? discharge xdfn6 (pb ? free) 5000 / tape & reel ncp4671dmx09tcg 0.9 v bd auto ? discharge xdfn6 (pb ? free) 5000 / tape & reel ncp4671dmx12tcg 1.2 v bf auto ? discharge xdfn6 (pb ? free) 5000 / tape & reel ncp4671dmx13tcg 1.3 v bg auto ? discharge xdfn6 (pb ? free) 5000 / tape & reel ncp4671dmx15tcg 1.5 v bj auto ? discharge xdfn6 (pb ? free) 5000 / tape & reel ?for information on tape and reel specifications, including part orientation and tape sizes, please refer to our tape and reel packaging specifications brochure, brd8011/d.
ncp4671 http://onsemi.com 21 package dimensions notes: 1. dimensioning and tolerancing per ansi y14.5m, 1982. 2. controlling dimension: inch. 3. 419a ? 01 obsolete. new standard 419a ? 02. 4. dimensions a and b do not include mold flash, protrusions, or gate burrs. dim a min max min max millimeters 1.80 2.20 0.071 0.087 inches b 1.15 1.35 0.045 0.053 c 0.80 1.10 0.031 0.043 d 0.10 0.30 0.004 0.012 g 0.65 bsc 0.026 bsc h --- 0.10 --- 0.004 j 0.10 0.25 0.004 0.010 k 0.10 0.30 0.004 0.012 n 0.20 ref 0.008 ref s 2.00 2.20 0.079 0.087 b 0.2 (0.008) mm 12 3 4 5 a g s d 5 pl h c n j k ? b ? sc ? 88a (sc ? 70 ? 5/sot ? 353) case 419a ? 02 issue k
ncp4671 http://onsemi.com 22 package dimensions notes: 1. dimensioning and tolerancing per asme y14.5m, 1994. 2. controlling dimension: millimeters. 3. dimension b applies to plated terminal and is measured between 0.15 and 0.25mm from terminal tips. 4. coplanarity applies to all of the terminals. a seating plane d e 0.05 c a a1 2x 2x 0.05 c xdfn6 1.2x1.2, 0.4p case 711aa ? 01 issue o dim a min max millimeters --- 0.40 a1 0.00 0.05 b 0.13 0.23 d e e l pin one reference 0.05 c 0.05 c note 3 l e b 3 6 6x 1 4 mounting footprint* 1.20 bsc 1.20 bsc 0.40 bsc 0.37 0.48 bottom view c dimensions: millimeters 0.66 6x 0.22 6x 1.50 0.40 pitch *for additional information on our pb ? free strategy and soldering details, please download the on semiconductor soldering and mounting techniques reference manual, solderrm/d. c 0.20 0.30 top view b side view note 4 recommended c 6x a m 0.05 b c package outline
ncp4671 http://onsemi.com 23 package dimensions sot ? 23 5 ? lead case 1212 ? 01 issue a dim min max millimeters a1 0.00 0.10 a2 1.00 1.30 b 0.30 0.50 c 0.10 0.25 d 2.70 3.10 e 2.50 3.10 e1 1.50 1.80 e 0.95 bsc l l1 0.45 0.75 notes: 1. dimensioning and tolerancing per asme y14.5m, 1994. 2. controlling dimensions: millimeters. 3. datum c is the seating plane. a 1 5 23 4 d e1 b l1 e e c m 0.10 c s b s a b 5x a2 a1 s 0.05 c l 0.20 --- *for additional information on our pb ? free strategy and soldering details, please download the on semiconductor soldering and mounting techniques reference manual, solderrm/d. soldering footprint* 0.95 dimensions: millimeters pitch 5x 3.30 0.56 5x 0.85 a --- 1.45 recommended a on semiconductor and are registered trademarks of semiconductor components industries, llc (scillc). scillc reserves the right to mak e changes without further notice to any products herein. scillc makes no warranty, representation or guarantee regarding the suitability of its products for an y particular purpose, nor does scillc assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including wi thout limitation special, consequential or incidental damages. ?typical? parameters which may be provided in scillc data sheets and/or specifications can and do vary in different application s and actual performance may vary over time. all operating parameters, including ?typicals? must be validated for each customer application by customer?s technical experts. scillc does not convey any license under its patent rights nor the rights of others. scillc products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the scillc product could create a sit uation where personal injury or death may occur. should buyer purchase or use scillc products for any such unintended or unauthorized application, buyer shall indemnify and hold scillc and its of ficers, employees, subsidiaries, af filiates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, direct ly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that scillc was negligent regarding the design or manufacture of the part. scillc is an equal opportunity/affirmative action employer. this literature is subject to all applicable copyright laws and is not for resale in any manner. publication ordering information n. american technical support : 800 ? 282 ? 9855 toll free usa/canada europe, middle east and africa technical support: phone: 421 33 790 2910 japan customer focus center phone: 81 ? 3 ? 5817 ? 1050 ncp4671/d literature fulfillment : literature distribution center for on semiconductor p.o. box 5163, denver, colorado 80217 usa phone : 303 ? 675 ? 2175 or 800 ? 344 ? 3860 toll free usa/canada fax : 303 ? 675 ? 2176 or 800 ? 344 ? 3867 toll free usa/canada email : orderlit@onsemi.com on semiconductor website : www.onsemi.com order literature : http://www.onsemi.com/orderlit for additional information, please contact your local sales representative

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